1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to a semiconductor memory device capable of determining an operation mode using data pin signals so as to improve an efficiency of the manufacturing and producing process, and an operation mode determining method for the same.
2. Description of the Related Art
In a manufacturing process of a semiconductor memory device, it is desirable that a kind of the semiconductor memory device as a final product be determined in a latter stage of the manufacturing process.
The reason for this is that as the specific kinds of the product are determined later, more operations can be commonly shared in manufacturing various kinds of products. Such approach to process sharing has especial significance in manufacturing the semiconductor memory device. In manufacturing the semiconductor memory device based on a few items/mass production, the efficiency of the manufacturing process can be a crucial factor for competitiveness among manufacturers.
One important specification of the semiconductor memory device is a bit organization. The bit organization may be expressed by x1, x4, x8, etc. This expression represents the number of memory cells selected by one address.
That is, the bit organization represents the number of memory cells that are simultaneously read or written on by one addressing. For example, in the case of an x4 organization, four memory cells are accessed and four bit data are outputted in response to one address input signal.
Semiconductor memory devices having the same capacity may have different bit configurations. Accordingly, a 16M DRAM (dynamic random access memory) may have different bit organizations, for example, 16M×1, 4M×1, 2M×8, etc. The 16M×1 organization indicates that the semiconductor memory device has 16M number of 1-bit cells, and the 4M×1 organization indicates that the semiconductor memory device has 4M number of 4-bit cells. Further, the 2M×8 organization indicates that the semiconductor memory device has 2M number of 8-bit cells.
The semiconductor memory device can be expressed by an operation mode from a viewpoint of the bit organization representing the number of memory cells that are simultaneously read or written by one addressing. Therefore, it should be noted that the expression of the bit organization may be used herein as an alternative for the expression of the operation mode.
The x16, further x32, organization is used for a semiconductor memory device having high data bandwidth for the fields requiring high performance, for example, a graphic field. The x8 and x4 organizations are widely used in PC systems and server systems.
In addition, the ×1, ×4 and ×8 operation modes of the semiconductor memory device determine how many data pins the semiconductor device package will have. As described above, the ×1 operation mode can have one data input/output pin or two data pins in which a data-in pin and a data-out pin are separated. The x4 operation mode has four data pins and the ×8 operation mode has eight data pins.
Conventionally, however, the DRAM does not have the above-described bit organization at a wafer level during its manufacturing process, and the DRAM is assembled in the x4 or x8 bit organization during a packaging process.
Additionally, in some applications, e.g., PC system, the semiconductor memory devices are produced in a module architecture, in which the semiconductor memory devices are integrated on one printed circuit board (PCB), and the memory modules are mounted in respective slots of the systems.
Among a variety of types of the memory modules, a Dual In-line Memory Module (DIMM) is widely used. The DIMM can have various shapes and sizes, and a 168-pin, 184-pin or 240-pin DIMM are available.
The 184-pin configuration DIMM has widespread use for the memory module. Because the 184-pin DIMM has perfect, or near perfect x64 data buses, data may be transmitted with 64-bit data bandwidth. Therefore, the 184-pin DIMM is used as main memory in Pentium or higher class desktop systems or server systems.
As described above, one DIMM can have the ×64 organization at the module level. In this case, sixteen x4 DRAMs or eight x8 DRAMs are mounted on one module. Alternatively, one module can have an x72 organization at the module level. In this case, the additional eight bits of the x72 DIMM may be used to control data buses and check partial bit error.
FIG. 1 is a diagram illustrating a manufacturing process of conventional semiconductor memory devices with x8 and x4 organizations.
The manufacturing process and modulization process of the above-described semiconductor memory device is described below with reference to FIG. 1.
Before step S110 for a packaging process, the semiconductor memory devices exist at a wafer level 100 through common manufacturing processes without differentiating the x4 and x8 organizations. That is, prior to performing the step S110 of packaging the semiconductor memory device, all the semiconductor memory devices are manufactured in the x8 organization.
After the packaging step S110, the semiconductor memory devices having no difference in the wafer level 100 are classified into x8 memory devices 111 and x4 memory devices 112. Generally, in the packaging step S110, the semiconductor memory devices are differential or classified through a pad bonding.
After the semiconductor memory devices are classified into the x8 memory devices 111 and the x4 memory devices 114 in the packaging step S110, the process proceeds to steps S120a and S120b of verifying the semiconductor memory devices through test operations that are suitable for the respective organizations of the semiconductor memory devices. In these steps, according to test programs suitable for the respective organizations of the semiconductor memory devices, some parts of the test operations need to be separated.
In steps S130a and S130b, the tested semiconductor memory devices are assembled into memory modules according to their organizations, respectively.
When considering that productivity is enhanced as the specific kinds of the products are determined in the latter stage of the manufacturing process as described above, the above manufacturing process should be modified.
In the conventional art, the steps of assembling the memory module are not considered to be part of the above manufacturing process. Steps prior to the step S110 for packaging are considered to be the manufacturing process. However, the current trend is to manufacture the semiconductor memory device as a memory module, not a single product.
A Korean Patent Laid-Open Publication No. 2001-0065148 discloses an operating mode selecting circuit for determining an operation mode according to a bit organization of a semiconductor memory device by using an anti-fuse device after a packaging process. According to the publication, however, the operation mode selecting circuit merely programs the semiconductor memory device by using the anti-fuse device after the packaging process.
Accordingly, there exists a need for an operation of programming the semiconductor memory device through a separated test operation after the packaging process.